CMOS 4069 Driven Frequency Doubler

CMOS 4069 Driven Frequency Doubler

Circuit Project Description

The circuit has been designed using a single CMOS integrated circuit of model 4069 to produce a frequency that is twice of the input signal by functioning as a frequency doubler.

Terminology Frequency – a measure of the number or rate of occurrences of complete cycles within a given period of time at frequent intervals and is denoted as HertzFrequency Doubler – also known as Second Harmonic Generator that operates in the MHz range that contains an amplifier stage with a resonant anode circuit tuned to the second harmonic of the input frequency or the output frequency is twice the input frequency4069 – comprises of six or hex inverter circuits that is made of complementary metal oxide semiconductor (CMOS) to accomplish low power TTL consumption, symmetric controlled rise and fall times, high noise immunity, and wide power supply voltage operating range Circuit Explanation

The integrated circuit is with a hex inverter where six NOT gates are used to provide negation where the outputs are the represented as the opposite logic level of the input. To exchange between two logic levels, an inverter circuit serves as the basic logic gate. The output signal of a square wave input signal will have a frequency that is twice of its value since the circuit is functioning as a frequency doubler. Square waves are normally seen in signal processing, in digital switching circuits, and in electronics, which is a type of non-sinusoidal waveform that alternates instantaneously and regularly between two stages. Square waves have fast transitions used as clock signals and timing references which make it suitable for triggering logic circuits that are synchronous in a specific interval.

The input of N1 receives the signal which is a square wave having a duty cycle of around 50%. This level is compatible with CMOS logic having a supply voltage with a range of 3 V to 15 V peak to peak which can also be varied. CMOS N1 inverts and buffers the input signal that it receives while CMOS N2 inverts the input again. The outputs of N1 and N2 at the points A and B are 180º out of phase square wave signals. The outputs of N1 and N2 are being distinguished by C1 & R1, and C2 & R2 respectively. The two spike waveforms of points C and D will also be 180º out of phase. The signals coming from N2 are being inverted, shaped and buffered by CMOS N3 and N4. A NOR gate is then combined with these signals and consists of R3, D1, D2, and N5. The final stage is done by N6 as it inverts the signal coming from N5 which will result the frequency that is twice that of the input signal.

The circuit will function over a range of wide frequency. The width of square pulses in the points E and F will be around 500 ns. With this value, when the frequency is 1 MHz, the duty cycle of the output will be 50%. A 1 MHz frequency will be produced when the input frequency is at least 500 KHz.


The integrated circuit 4069 is intended for general purpose inverter applications which contain an internal circuit that is composed of a single stage inverter which makes it suitable for the applications of CR oscillator circuits, linear amplifiers, and crystal oscillator circuits as an added feature to its application as inverters. The frequency doublers have good odd harmonic rejection with high conversion efficiency. Broadband frequency doublers are packaged in modules which feature proprietary transformers with excellent bandwidth but the designs can exceed other performance specifications.

A frequency doubler may be used as a quadrupler by using the fourth harmonic instead of the second at the output. They can also be used to make 532 nm lasers from an 808 nm source by the industry of laser enthusiast. The source will be converted to 1064 nm laser light which will be fed via a large potassium dehydration phosphate (KDP). To prevent the leakage of infrared light, it will be enclosed by an infrared filter. This leakage may be harmful to the human eyes.

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